1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same and, more particularly, to an extremely thin barrier metal structure and a method for manufacturing the same.
2. Description of the Related Art
The fine patterning and the integration density of semiconductor device structures are still energetically being improved. As for the fine patterning, presently, a design rule of 0.10 xcexcm for semiconductor elements is discussed in various ways, so that DRAMs, ultra-high speed logic ICs, and their hybrid ULSI semiconductor devices based on this design rule are being studied and developed.
To improve the integration density, operation speed, and multifarious-functioning and also to reduce the power dissipation of such semiconductor devices, it is very important to form an extremely thin barrier metal.
For example, with increasing integration densities of ULSIs, copper (Cu) or Cu alloys are more effectively used as a conductive layer of a trench wiring line (also called damascene wiring line). In this case, however, it is indispensable to provide a barrier metal for preventing this Cu material from being diffused. Moreover, with improving fine patterning of the wiring line, it is required to make the barrier metal film extremely thin, i.e. 5 nm or less.
In an opening (connection via hole or contact hole) for interconnection of wiring line layers in a multi-layer wiring line structure, the barrier metal film having a extremely thin thickness is indispensable as this opening is also more and more fine patterned.
Further, also in the case of DRAM memory cells each including one transistor and one capacitor, an extremely thin barrier metal is indispensable in formation of this capacitor.
The following will describe in detail the case of the DRAM memory cell with reference to the drawings. FIG. 1A to FIG. 1C are schematic cross-sectional views of sequential steps for manufacturing a pair of the above-mentioned memory cells in its memory-cell array.
As shown in FIG. 1A, an element-isolating insulator film 102 is formed in a predetermined region on the surface of a P conductivity-type silicon substrate 101. This element-isolating insulator film 102 is formed by a well-known trench-element-isolating method. In an element""s active region surrounded by this element-separating insulator film 102 are formed a pair of insulated gate field effect transistors (MOSFETs) constituting the above-mentioned transistor, the gate electrodes of which provide word lines 103 and 103a. 
Further, to the word lines 103 and 103a is introduced an N-type impurity in a self-alignment manner, to thereby form a bit-line-diffused layer 104 as well as diffused layers 105 and 105a for connecting capacitors. The bit-line-diffused layer 104 is connected via a contact plug 106 to a bit line 107. Also, the diffused layers 105 and 105a are connected via connection holes formed in a first inter-layer insulator film 108 respectively to lower electrodes 109 and 109a of the capacitor. Those lower electrodes 109 and 109a are formed by patterning a polycrystalline silicon (poly-silicon) film containing a phosphorus impurity.
Next, as shown in FIG. 1B, a dielectric insulator film 110 is formed on the lower electrodes 109 and 109a as adhered thereon. As this dielectric insulator film, a highly dielectric material with a relatively high dielectric constant is used. This highly dielectric insulator film may be made of, for example, a tantalum oxide film (Ta2O5 film), strontium titanate film (STO film), barium-strontium titanate film (BST film), or lead zirconate titanate film (PZT film).
Next, as shown in FIG. 1C, a titanium nitride film 111 and a tungsten silicide film 112 are formed by sputtering. Then, they are patterned by well-known photo-resist and dry etching technologies to form a cell plate. Thus, a pair of capacitors is formed which comprises the lower electrodes 109 and 109a, the dielectric insulator film 110, and the above-mentioned cell plate.
Then, a second inter-layer insulator film 113 including a silicon oxide film is formed so as to cover the whole surface.
In the case of a trench wiring line made of Cu or a Cu alloy, the Cu material thereof must be coated with a barrier metal film to prevent its diffusing. If, for example, a prior art technology using a titanium nitride film as the barrier metal is employed, however, its film thickness must be 20 nm or more. Such a film thickness order of the barrier metal may increase the resistance of the wiring line to thus deteriorate the performance of the semiconductor device as the wiring line is decreased in width. This is because such a barrier metal has a higher specific resistance than Cu. This problem holds true also with the formation of a barrier metal in the above-mentioned opening.
Also, a silicon nitride film may be used as the above-mentioned diffusion preventing film and is effective as a barrier for the trench wiring line. When it is connected to another wiring line or electrode, however, the silicon nitride film cannot be applied as is because it is an insulator film; thus requiring complicated process steps.
On the other hand, a highly dielectric material used as the dielectric insulator film of the capacitor shown in FIG. 1 has generally a low heat-resistant, and oxygen contained in this highly dielectric film is diffused at a temperature of about 800xc2x0 C., thus very easily reducing the capacitance of the capacitor and deteriorating its insulation.
Therefore, a barrier metal film needs to be interposed between the lower electrode and the dielectric insulator film indispensably. If, however, a titanium nitride film is used as the barrier metal as in a prior art, it is necessary to have a large film thickness, so that the spacing between the lower electrodes 109 and 109a mentioned with the prior art cannot be reduced. In consequence, the area of a memory cell is increased by that much so that a highly dielectric material such as mentioned above cannot effectively be applied on the dielectric insulator film of the capacitor.
Accordingly, one object of the invention is to provide an extremely thin barrier metal that can prevent oxygen from being diffused from a highly dielectric material employed.
Another object of the invention is to provide an extremely thin barrier metal that can be used on a trench wiring line or a connection opening through which wiring line layers are interconnected.
Yet another other object of the invention is to shorten the required manufacturing process steps and reduce the costs for manufacturing the semiconductor device.
According to one feature of the present invention, there is provided on a semiconductor device in which an insulating layer formed on the surface of a conductor film of a semiconductor substrate is reformed into a conductive barrier layer.
According to another feature of the present invention, there is provided a semiconductor device in which part or the whole of an insulating layer formed on a surface of an insulator film on the semiconductor substrate is reformed into a conductive barrier layer.
In the above mentioned semiconductor devices, the insulating layer is preferably a silicon nitride film and the conductive barrier layer is preferably a metal compound of high melting-point metal, silicon (Si) and nitrogen (N). The high melting-point metal is a metal selected from a group consisting of titanium (Ti), tantalum (Ta), Nickel (Ni), molybdenum (Mo) and tungsten (W).
Alternatively, the insulating layer is preferably a silicon nitride film, and the conductive barrier layer is preferably made of Tixe2x80x94Sixe2x80x94N with a ratio of 25-35 atomic percent of Ti, 30-40 atomic percent of Si, and 30-40 atomic percent of N.
Further, the conductor film may be a lower electrode of a capacitor. In this case, a dielectric film of the capacitor is adhered on the upper surface of the conductive barrier layer, and an upper electrode, that is, a cell plate of the capacitor is formed on the surface of the dielectric film. The dielectric film may be a tantalum oxide film, a strontium titanate film, a barium-strontium titanate film, or lead zirconate titanate film.
Moreover, the insulator film may constitute an inter-insulator film, so that the conductive barrier layer is formed on a side wall of a wiring line trench provided in a predetermined region of this inter-layer insulator film. A metal material is filled in the wiring line trench via the conductive barrier, thus forming a trench wiring line in the inter-layer insulator film. Preferably, the metal material is copper (Cu).
According to yet another feature of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of forming a conductor film on a semiconductor substrate and then adhering an insulating layer on the surface of the conductor film, and applying an active species (an active species means plural active species of one kind) of a high melting-point metal onto the surface of the insulating layer under a condition of heating the semiconductor substrate to thereby reform the insulating layer into a conductive barrier layer.
According to further another feature of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of forming an insulator film on a semiconductor substrate and then adhering an insulating layer on the surface of the insulator film, and applying an active species of a high melting-point metal onto the surface of the above-mentioned insulating layer under a condition of heating the semiconductor substrate to thereby reform part or the whole of the above-mentioned insulating layer into a conductive barrier layer.
According to more another feature of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of patterning a poly-silicon film to thereby form the lower electrode of the capacitor of the semiconductor device on its semiconductor substrate, transforming by thermal nitridation the surface of the lower electrode into a silicon nitride layer, applying an active species of a high melting-point metal onto the surface of the silicon nitride layer under a condition of heating the semiconductor substrate to thereby reform the silicon nitride layer into a conductive barrier layer, and stacking and forming a dielectric insulator film and an upper electrode of the capacitor on the conductive barrier layer, in sequence.
According to yet another feature of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises the steps of forming an inter-layer insulator film on a semiconductor substrate and then a wiring line trench in a predetermined region of the inter-layer insulator film, forming an insulating layer which covers both an inside wall of the wiring line trench and the inter-layer insulator film, applying an active species of a high melting-point metal onto the surface of the insulating layer under a condition of heating the semiconductor substrate to thereby reform part or the whole of the insulating layer into a conductive barrier layer, forming a film of a metal material which fills the wiring line trench via the conductive barrier layer, and performing chemical-mechanical polishing on the above-mentioned metal material.
In the above mentioned methods of manufacturing semiconductor devices, preferably, the active species of the high melting-point metal may be produced by plasma-exciting or photo-exciting a halogen compound of this high melting-point metal. The high melting-point metal is preferably titanium (Ti), tantalum (Ta), nickel (Ni), Molybdenum (Mo), or tungsten (W). Alternatively, the insulating layer is preferably a silicon nitride film, while the high melting-point metal compound is preferably titanium tetra-chloride.
By the methods for manufacturing the semiconductor devices according to the invention, the temperature for heating the semiconductor substrate during the application of the active species may set at 400xc2x0 C. or higher, 1000xc2x0 C. or lower. Further, to reform efficiently by the active species the substrate temperature of 500xc2x0 C. or higher is preferable, and 800xc2x0 C. or lower substrate temperature is preferable considering the thermal stress affect to other portions of the device.
The features of the present invention resides in that an amorphous insulating layer is once formed on the conductor film or insulator film on the semiconductor substrate and then reformed into a conductive barrier layer. Generally, the insulating layer can be easily formed by Chemical Vapor Deposition (CVD) and, moreover, thus formed insulating layer has excellent step coverage.
Therefore, the conductive barrier layer formed by reforming the insulating layer has very good step coverage. Moreover, generally, thus formed conductive barrier layer is amorphous in contrast to the poly-crystallized structure of a barrier metal formed by the prior art, thus greatly improving the barrier effects. This is because while the poly-crystallized structure involves the diffusion of oxygen or copper through a grain boundary, the amorphous structure has no grain boundary therein, so that the diffusion through such grain boundary can completely be inhibited.
Further, the above-mentioned insulating layer can be easily controlled in film thickness, which permits greatly facilitating the formation of the extremely thin insulating layer, hence that of the conductive barrier layer.